Madhura, R., & Shantiprasad, M. (2020). Implementation of Scan Logic and Pattern Generation for RTL Design. Springer Nature. https://doi.org/10.1007/978-3-030-41862-5_37
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Udgirkar, G., & Indumathi, G. (2019). Consideration of net weights for performance driven routing. International Journal of Engineering and Advanced Technology, 8(3), 463-467,.
Deshmukh, V., Vivek, K., Mangalwede, S., & Rao, D. (2018). Analysis of teacher-student learning style on student feedback using manhattan algorithm. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICEECCOT43722.2018.9001512
Deshmukh, V., Mangalwede, S., & Rao, D. (2018). Student performance evaluation using data mining techniques for engineering education. Advances in Science, Technology and Engineering Systems, 3(6), 259-264,. https://doi.org/10.25046/aj030634
Gudi, V., & Nagaraj, H. (2018). An Interpretation on Type-I Type-II Compensators for PWM Controlled SBC in VRM Applications. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICRIEECE44171.2018.9009193
Shruthi, M., Harsha, B., & Indumathi, G. (2020). Implementation of Visible Foreground Abstraction Algorithm in MATLAB Using Raspberry Pi. In Lecture Notes in Networks and Systems (Vol. 98, pp. 248-254,). Springer. https://doi.org/10.1007/978-3-030-33846-6_28
Rao, D., Mangalwede, S., & Deshmukh, V. (2017). Student performance evaluation model based on scoring rubric tool for network analysis subject using fuzzy logic. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICEECCOT.2017.8284623
Udgirkar, G., & Indumathi, G. (2019). Research on net weighting schemes in performance driven global routing. International Journal of Recent Technology and Engineering, 8(2 Special Issue 3), 1145-1150,. https://doi.org/10.35940/ijrte.B1212.0782S319
Girish, H., & Shahshikumar, D. (2019). A novel optimization framework for controlling stabilization issue in design principle of FinFET based SRAM. International Journal of Electrical and Computer Engineering, 9(5), 4027-4034,. https://doi.org/10.11591/ijece.v9i5.pp4027-4034
Girish, H., & Shashikumar, D. (2017). Cost-effective computational modeling of fault tolerant optimization of FinFET-based sram cells. Springer Verlag. https://doi.org/10.1007/978-3-319-57264-2_1
