Latency and Throughput Analysis in 3D NoC Design for Streaming Platform

As multi-core systems scale to accommodate increasingly complex applications, Network-on-Chip (NoC) architectures have become essential for managing on-chip communication. This paper presents a high-performance 3D NoC architecture optimized for streaming applications that require consistent data flow and real-time responsiveness. A label switching technique is employed to reduce routing complexity and transmission latency by replacing conventional destination addressing with compact labels. To overcome scalability limitations of traditional 2D NoC designs, the proposed system adopts a 4 4 4 3D mesh topology, which significantly reduces interconnect distances and enhances performance. A Max-Flow Routing algorithm dynamically identifies optimal communication paths based on bandwidth availability, while a centralized NoC manager monitors link utilization and allocates bandwidth in real time. Additionally, a Bit Transition Encoder-Decoder (BTED) mechanism is integrated to minimize switching activity and improve energy efficiency. The proposed architecture is evaluated across key metrics, latency 55% and throughput 84% compared to state of art work which demonstrates its suitability for high-bandwidth, energy-efficient streaming applications.