H. Girish

First name
H.
Last name
Girish
Venkatesh, R., Kumar, P., Das, D., Girish, H., Hanbin, W., & Elyas, A. (2026). Machine Learning-Driven Predictive Maintenance for Wind Turbines. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/EPREC66546.2026.11412064
Ramkumar, G., Alluwaici, M., Vijetha, T., Girish, H., Venkatraman, A., & Ramya, M. (2026). A Reliable System Performance Through NeuToMa with Spiking Neural Network Transformation in Network on Chip (NoC) Communication. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/IC3ET64989.2026.11467379
Murali, B., Samhan, A. A., Miriyala, G., Girish, H., Ramya, M., & Sravani, K. (2026). Machine-Learning Optimization of Rubber-Mixing and Curing Processes. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/AIEI69164.2026.11497628
Sundar, S., Priyanka, C., & Girish, H. (2026). Design and Analysis of a D-Band LC Bandpass Filter and Low-Noise Amplifier for 6G Front-End Applications. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/IATMSI68868.2026.11466038
Tiwari, A., Kumar, J., Syed, W., & Girish, H. (2026). Efficient FPGA-Based CNN Accelerator for Real-Time Traffic Sign Classification on PYNQ-Z2. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/AIEI69164.2026.11496958
Raja, A., Kushwaha, R., Nuritdinovich, M., Girish, H., Kadhim, R., & Thirugnanasambandham, T. (2026). A Lightweight and Intelligent DBFT-Based Consensus Framework for Sustainable IoT Blockchain Networks. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICETSIS68266.2026.11549357
Girish, H., & Shashikumar, D. (2019). SOPA: Search optimization based predictive approach for design optimization in finFET/SRAM. Springer Verlag. https://doi.org/10.1007/978-3-319-91189-2_3
Girish, H., & Shahshikumar, D. (2019). A novel optimization framework for controlling stabilization issue in design principle of FinFET based SRAM. International Journal of Electrical and Computer Engineering, 9(5), 4027-4034,. https://doi.org/10.11591/ijece.v9i5.pp4027-4034
Girish, H., & Shashikumar, D. (2017). Cost-effective computational modeling of fault tolerant optimization of FinFET-based sram cells. Springer Verlag. https://doi.org/10.1007/978-3-319-57264-2_1
Girish, H., & Shashikumar, D. (2019). PaoD: A predictive approach for optimization of design in FinFET/SRAM. International Journal of Electrical and Computer Engineering, 9(2), 960-966,. https://doi.org/10.11591/ijece.v9i2.pp.960-966
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