Efficient FPGA-Based CNN Accelerator for Real-Time Traffic Sign Classification on PYNQ-Z2

This paper demonstrates a hardware accelerator for convolutional neural networks (CNNs) based on ARM is designed and developed on the PYNQ-Z2 platform. The system is able to leverage the heterogeneous nature of the Xilinx Zynq SoC, which integrates an ARM Cortex-A9 Processing System (PS) and Programmable Logic (PL) fabric, to support effective hardware-software co-design. The computationally demanding convolutional operations are carried out as a native 2D convolution IP core in Verilog in the FPGA, and the other CNN layers are processed in Python on the PS. The real-Time image classification performance of the proposed accelerator is tested on the German Traffic Sign Recognition Benchmark (GTSRB) dataset. Experiments demonstrate the efficacy of FPGA acceleration of embedded deep learning tasks in edge vision and intelligent transportation systems through energy efficiency and speed improvement compared to software execution.